|
|
Publications in Math-Net.Ru |
Citations |
|
2024 |
1. |
Yu. A. Stepchenkov, D. V. Hilko, Yu. G. Diachenko, N. V. Morozov, D. Yu. Stepchenkov, G. A. Orlov, “Desynchronization methodology at self-timed circuit synthesis”, Sistemy i Sredstva Inform., 34:1 (2024), 33–43 |
1
|
|
2021 |
2. |
D. V. Khilko, Yu. A. Stepchenkov, Yu. I. Shikunov, Yu. G. Diachenko, G. A. Orlov, “Hardware support of fast Fourier transform optimization in a recurrent signal processor”, Sistemy i Sredstva Inform., 31:4 (2021), 71–83 |
3. |
Yu. A. Stepchenkov, N. V. Morozov, Yu. G. Diachenko, D. V. Khilko, “Recurrent signal processor hardware implementation”, Sistemy i Sredstva Inform., 31:3 (2021), 113–122 |
|
2020 |
4. |
Yu. A. Stepchenkov, N. V. Morozov, Yu. G. Diachenko, D. V. Khilko, D. Yu. Stepchenkov, “Multicore hybrid recurrent architecture expansion on FPGA”, Sistemy i Sredstva Inform., 30:4 (2020), 95–101 |
|
2015 |
5. |
D. V. Khilko, Yu. A. Stepchenkov, Yu. G. Diachenko, Yu. I. Shikunov, N. V. Morozov, “Hardware and software modeling and testing of the recurrent operational device”, Sistemy i Sredstva Inform., 25:4 (2015), 78–90 |
2
|
|
2013 |
6. |
D. Khilko, Yu. Stepchenkov, “Theoretical aspects of programming methodology development for recurrent architecture”, Sistemy i Sredstva Inform., 23:2 (2013), 133–153 |
6
|
|
2012 |
7. |
D. Khilko, Yu. Stepchenkov, “Dataflow architecture model and its usage with a word recognizer program as an example”, Sistemy i Sredstva Inform., 22:2 (2012), 48–57 |
1
|
|
2010 |
8. |
R. Zelenov, Yu. Stepchenkov, V. Volchek, D. Hilko, A. Shneyder, A. Prokofyev, “System of capsule programming and debugging”, Sistemy i Sredstva Inform., 20:1 (2010), 24–30 |
5
|
|
2008 |
9. |
Yu. A. Stepchenkov, V. S. Petrukhin, D. V. Hilko, “Selection of programming languages for representing parallel algorithms for recurrent signal processor”, Sistemy i Sredstva Inform., 2008, no. supplementary issue, 149–158 |
1
|
|
Organisations |
|
|
|
|