Hardware and software modeling and testing of the recurrent operational device

The paper considers the main problems of modeling and debugging of the operational device based on the principles of the nonconventional data-flow recurrent architecture. The short description of the methodology of hardware and software modeling of Hardware in the Loop is provided; also, the possibility of its application for developing a recurrent operational device is considered. An approach and a technique of hardware and software modeling and testing of devices on the basis of the new architecture are suggested. The paper describes the developed program and models of the device's hardware, simulating and debugging tools, and the result of their integration into the uniform environment. The concept of the target platform of modeling called GAROS IDE is introduced. The descriptions of its main components, functionality, and prospects of development are presented. The results of approbation of this platform on one of the subtasks of isolated word recognition (the algorithm of Rasta-filtration) are reported.