Performance characteristics of $p$-channel FinFETs with varied Si-fin extension lengths for source and drain contacts

The length of Source/Drain (S/D) extension $(L_{\operatorname{SDE}})$ of nano-node p-channel FinFETs ($p$FinFETs) on SOI wafer influencing the device performance is exposed, especially in drive current and gate/S/D leakage. In observation, the longer $L_{\operatorname{SDE}}$ $p$FinFET provides a larger series resistance and degrades the drive current $(I_{\operatorname{DS}})$, but the isolation capability between the S/D contacts and the gate electrode is increased. The shorter $L_{\operatorname{SDE}}$ plus the shorter channel length demonstrates a higher trans-conductance $(G_{m})$ contributing to a higher drive current. Moreover, the subthreshold swing (S.S.) at longer channel length and longer $L_{\operatorname{SDE}}$ represents a higher value indicating the higher amount of the interface states which possibly deteriorate the channel mobility causing the lower drive current.