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Publications in Math-Net.Ru |
Citations |
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1985 |
| 1. |
G. G. Asatiani, O. G. Smorodinova, V. G. Chachanidze, “A Hardware Method of Taking Log and Antilog Binary Codes in Design of Fast Arithmetic-Logical Devices. II”, Avtomat. i Telemekh., 1985, no. 4, 118–128  |
| 2. |
G. G. Asatiani, O. G. Smorodinova, V. G. Chachanidze, “Method of binary log-antilog evaluation in hardware for fast arithmetic-logical units. I”, Avtomat. i Telemekh., 1985, no. 2, 139–150  ; Autom. Remote Control, 46 (1985), 261–270 |
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1983 |
| 3. |
G. G. Asatiani, V. G. Chachanidze, “On algorithms for design of finite automata in uniform computing arrays with faulty cells”, Avtomat. i Telemekh., 1983, no. 1, 160 |
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1982 |
| 4. |
G. G. Asatiani, V. G. Chachanidze, “Redundancy of finite automata in uniform computing arrays”, Avtomat. i Telemekh., 1982, no. 4, 139–149 ; Autom. Remote Control, 43:4 (1982), 543–552 |
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1981 |
| 5. |
G. G. Asatiani, V. G. Chachanidze, “On redundancy of digital units in uniform computing arrays”, Avtomat. i Telemekh., 1981, no. 1, 154–165 ; Autom. Remote Control, 42:1 (1981), 125–134 |
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1979 |
| 6. |
G. G. Asatiani, T. O. Kublashvili, R. Z. Mirianashvili, L. V. Skobeleva, O. G. Smorodinova, V. G. Chachanidze, “Design of multifunctional cells in a multi-purpose uniform computing array”, Avtomat. i Telemekh., 1979, no. 7, 146–155 ; Autom. Remote Control, 40:7 (1979), 1064–1071 |
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