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Publications in Math-Net.Ru |
Citations |
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2024 |
1. |
D. I. Cheremisinov, L. D. Cheremisinova, “Graph methods for recognition of CMOS gates in transistor-level circuits”, Prikl. Diskr. Mat., 2024, no. 64, 43–55 |
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2012 |
2. |
L. D. Cheremisinova, “Formal verification of logical descriptions with functional uncertainty based on logarithmic encoding of conditions”, Avtomat. i Telemekh., 2012, no. 7, 139–153 ; Autom. Remote Control, 73:7 (2012), 1216–1226 |
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