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Publications in Math-Net.Ru |
Citations |
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2019 |
| 1. |
D. A. Lebedev, M. V. Petrochenkov, “Test environment for verification of multi-processor memory subsystem unit”, Proceedings of ISP RAS, 31:3 (2019), 67–76   |
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2018 |
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M. V. Petrochenkov, R. E. Mushtakov, D. I. Shpagilev, “Verification of system on chip integrated communication controllers”, Proceedings of ISP RAS, 30:3 (2018), 195–206 |
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2017 |
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M. V. Petrochenkov, R. E. Mushtakov, I. A. Stotland, “Verification of 10 Gigabit Ethernet controllers”, Proceedings of ISP RAS, 29:4 (2017), 257–268 |
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2016 |
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Mikhail Petrochenkov, Irina Stotland, Ruslan Mushtakov, “Approaches to stand-alone verification of multicore microprocessor caches”, Proceedings of ISP RAS, 28:3 (2016), 161–172 |
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2015 |
| 5. |
Alexander Kamkin, Mikhail Petrochenkov, “A model-based approach to design test oracles for memory subsystems of multicore microprocessors”, Proceedings of ISP RAS, 27:3 (2015), 149–160 |
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