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This article is cited in 2 scientific papers (total in 2 papers)
Fault-tolerant self-timed serial-parallel port: variants of realization
Yu. A. Stepchenkova, A. N. Kamenskihb, S. F. Tyurinb, Y. G. Diachenkoa a Institute of Informatics Problems, Federal Research Center
"Computer Science and Control" of the Russian Academy of Sciences, 44-2 Vavilova Str., Moscow 119333, Russian Federation
b Faculty of Electrical Engineering, Department of Automation and Telemechanics, Perm National Research Polytechnic University, 29 Komsomol Prosp., Perm 614990, Russian Federation
Abstract:
The design of digital devices with both reliability and energy-efficiency is one of the important directions of information technologies development. The self-timed circuits have unique properties — width operation range, self-testing for stuck-at faults and energy-consumption decrease. The ability of self-test makes self-repair techniques better and more perspective for self-timed circuits. However, the fault-tolerance is necessary for some fields of application. The key difference between different techniques of reliability improvement is researched in this paper by the example of proposed technical solutions that realize most efficient designing methods. The usage of complex indices provides comparison of designs.
Keywords:
self-timed; reliability; fault-tolerance; failsafe feature.
Received: 15.08.2016
Citation:
Yu. A. Stepchenkov, A. N. Kamenskih, S. F. Tyurin, Y. G. Diachenko, “Fault-tolerant self-timed serial-parallel port: variants of realization”, Sistemy i Sredstva Inform., 26:3 (2016), 48–59
Linking options:
https://www.mathnet.ru/eng/ssi473 https://www.mathnet.ru/eng/ssi/v26/i3/p48
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Abstract page: | 222 | Full-text PDF : | 62 | References: | 34 |
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