|
This article is cited in 4 scientific papers (total in 4 papers)
Self-timed fused multiply-add unit: Practical implementation
Y Stepchenkova, Y Diachenkoa, Y. Rogdestvenskia, N. Morozova, D. Stepchenkova, A. Rogdestvenskenea, A. Surkovb a Institute of Informatics Problems, Russian Academy of Sciences, Moscow 119333, 44-2 Vavilova Str., Russian Federation
b Scientific Research Institute for System Studies, Russian Academy of Sciences, 36, bld. 1, Nakhimovsky Prosp., Moscow 117218, Russian Federation
Abstract:
Paper presents the results of designing Speed-Independed Fused Multiply-Add (SIFMA) variants compliant with the IEEE 754 Standard. SIFMA performs either one double precision FMA operation or one or two single precision operations simultaneously under three operands. SIFMA was designed for the standard 65-nanometer CMOS (complementary metall–oxide–semiconductor) technology. It uses both a standard cell library and a self-timed cell library designed in IPI RAS. One SIFMA variant operates with a synchronous environment, while another works with an asynchronous environment. Both variants provide an average performance up to 1 GFlops for 1-volt supply and environment temperature of 25$^\circ$C. At these conditions, energy consumption does not exceed 970 mJ/GHz.
Keywords:
self-timed circuit; ternary coding; multiplier; adder; subtracter; pipeline; indication.
Received: 20.08.2014
Citation:
Y Stepchenkov, Y Diachenko, Y. Rogdestvenski, N. Morozov, D. Stepchenkov, A. Rogdestvenskene, A. Surkov, “Self-timed fused multiply-add unit: Practical implementation”, Sistemy i Sredstva Inform., 24:3 (2014), 63–77
Linking options:
https://www.mathnet.ru/eng/ssi360 https://www.mathnet.ru/eng/ssi/v24/i3/p63
|
Statistics & downloads: |
Abstract page: | 211 | Full-text PDF : | 84 | References: | 35 |
|