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Parallelism in microprocessors
A. K. Gorsheninab, S. V. Zamkovetsab, V. N. Zakharovb a Moscow Institute of Radio, Electronics, and Automation (MIREA), 78 Vernadskogo Ave., Moscow 119454, Russian Federation
b Institute of Informatics Problems, Russian Academy of Sciences,
44-2 Vavilov Str., Moscow 119333, Russian Federation
Abstract:
Microprocessor performance is largely determined by the degree of organization of parallel work of various units. Different ways of microprocessor parallelization are considered. For parallel processing of commands, the pipeline method is used; for parallel data processing, the SIMD (Single Instruction – Many Data) architecture is applied. The implemented method of thread-level parallelism was the basis for creation of multicore microprocessors. A multicore microprocessor is one of more powerful processors that are surrounded by a multitude of auxiliary engines, which are designed for more efficient processing of complex multimedia applications in the multithreaded mode. Architectures with support of chip-level multiprocessing represent the future of microprocessors, because such architecture can achieve huge productivity levels with more acceptable frequencies through parallel execution of many operations.
Keywords:
microprocessor architecture; parallelization; pipeline; superscalar microprocessor; architecture of MMX and SSE; Hyper-Threading; multicore processors.
Received: 28.02.2014
Citation:
A. K. Gorshenin, S. V. Zamkovets, V. N. Zakharov, “Parallelism in microprocessors”, Sistemy i Sredstva Inform., 24:1 (2014), 46–60
Linking options:
https://www.mathnet.ru/eng/ssi327 https://www.mathnet.ru/eng/ssi/v24/i1/p46
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Abstract page: | 447 | Full-text PDF : | 556 | References: | 54 |
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