Boosting microprocessor systems performance by the cache effective utilization

As the disparity between microprocessor and memory speeds continues to grow, memory latency is becoming an increasingly important performance bottleneck. Prefetching is one approach to reducing the latency of memory operations in modern microprocessor systems. In this work the Markov prefetcher is described. This prefetcher is distinguished by prefetching multiple reference predictions from memory subsystem in case of lack of data in the cache. Many important technical and commercial applications give rise to unstructured workloads. Large graphs or trees of structures often dynamically generated and may evolve during execution. Research on unstructured workloads is not common and only recently some R&D results in this area have begun to appear.