Experimental testing of some strictly self-timed circuits features

The direct investigation of some features of self-timed circuits (SST) implemented in Gate Array technology has been performed for the first time in Russia. The main goal was the investigation of the following theoretically expected features of SST: independence from components delays, wide spread of operational conditions, safety of operation. The results of investigation in wide range of operating voltage and temperatures performed for two implementations of comparatively simple experimental SST circuits are presented. Performed experiments completely confirmed the theoretical predictions regarding SST behavior and at first unexampled wide range of their capacity for work.