Universal subsystem for self-timed circuits analysis

The article presents the analysis of asynchronous circuits to determine independence of their behavior from components delay. Such circuits are called self-timed. The analysis is based on construction of the state transition diagrams covering all possible states of the circuit. It corresponds to the methods of circuit analysis in global states. The main advantage of these methods are their universality, namely feasibility for the analysis of all classes of the self-timed circuits. The subsystem ASYAN represents a software package permitting to reduce an elapsed time of an analysis procedure significantly as opposed to existing methods and, generally speaking, to achieve the maximum possible efficiency of the analysis.