Particularities of taxonomic self-timed circuits analysis

The article deals with a method of asynchronous circuits analysis examining their functionality independence on gate's delays. Suggested method theoretically is based on transition diagrams (in global models) with their following equivalent transforming into the event models. Developed algorithms of analysis have a strict fundamentality of global models method but do not require a complete inspection of accessible states of the circuit. As a result, the complexity of the problem has changed from exponential to the polynomial one. Taxonomic analysis clarifies the properties of the investigated schemes, presents a detailed diagnostics and determines possible reasons of violations.