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This article is cited in 1 scientific paper (total in 1 paper)
Hardware, software and distributed supercomputer systems
Insufficient memory bandwidth on Stencil code: the advantage of a vector dataflow processor
N. I. Dikarev, B. M. Shabanov, A. S. Shmelev Joint Supercomputer Center
Abstract:
The main factor limiting performance for the most part of highperformance computing applications is insufficient memory bandwidth, not computational power.
Software methods for overcoming this drawback are block methods localizing memory accesses within fast on-chip memory, and “software pipelining” for organizing calculations in the form of chains of arithmetic commands between memory accesses.
Software pipelining was applied to the 2D and 3D Stencil programs in vector dataflow processor.
Achieved performance was significantly higher than it is possible to get for the best traditional processors. (In Russian).
Key words and phrases:
vector processor, dataflow architecture, shared-memory multiprocessor, performance evaluation.
Received: 12.11.2018 05.12.2018 Accepted: 30.12.2018
Citation:
N. I. Dikarev, B. M. Shabanov, A. S. Shmelev, “Insufficient memory bandwidth on Stencil code: the advantage of a vector dataflow processor”, Program Systems: Theory and Applications, 9:4 (2018), 399–415
Linking options:
https://www.mathnet.ru/eng/ps323 https://www.mathnet.ru/eng/ps/v9/i4/p399
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Abstract page: | 195 | Full-text PDF : | 51 | References: | 26 |
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