Fizika i Tekhnika Poluprovodnikov
RUS  ENG    JOURNALS   PEOPLE   ORGANISATIONS   CONFERENCES   SEMINARS   VIDEO LIBRARY   PACKAGE AMSBIB  
General information
Latest issue
Archive

Search papers
Search references

RSS
Latest issue
Current issues
Archive issues
What is RSS



Fizika i Tekhnika Poluprovodnikov:
Year:
Volume:
Issue:
Page:
Find






Personal entry:
Login:
Password:
Save password
Enter
Forgotten password?
Register


Fizika i Tekhnika Poluprovodnikov, 2020, Volume 54, Issue 12, Page 1374 (Mi phts6681)  

This article is cited in 3 scientific papers (total in 3 papers)

Semiconductor physics

Analytical drain current modeling and simulation of triple material gate-all-around heterojunction TFETs considering depletion regions

C. Usha, P. Vimala

Department of Electronics and Communication, Dayananda Sagar College of Engineering, Bangalore, Karnataka, India
Full-text PDF (27 kB) Citations (3)
Abstract: This paper deals with electrostatic behavior of triple-material gate-all-around hetero-junction tunneling field-effect transistors (TMGAA-HJTFET) device. The model is advantageous in apprehending a comparative study with the single-material gate-all-around hetero-junction tunneling field-effect transistors (SMGAA-HJTFET) in terms of surface potential, electric field, drain current, transconductance, and threshold voltage. The surface-potential distribution in partition regions along the channel is solved by using two-dimensional Poisson’s equation. By using the drift and diffusion current, drain current is derived, and $I_{\operatorname{On}}/I_{\operatorname{Off}}$ ratio of 10$^{11}$ is gained from analytical modeling and TCAD simulation. Transconductance and threshold voltage are derived from the tunneling current. The proposed model results are validated by the ATLAS TCAD simulation tool.
Keywords: drain current, surface potential, electric field, TFETs, TCAD simulation.
Funding agency Grant number
Government of India SR/WOS-A/ET-5/2017
This work was supported by Women Scientist Scheme-A, Department of Science and Technology, New Delhi, Government of India, under the Grant SR/WOS-A/ET-5/2017.
Received: 11.05.2020
Revised: 07.07.2020
Accepted: 13.08.2020
English version:
Semiconductors, 2020, Volume 54, Issue 12, Pages 1634–1640
DOI: https://doi.org/10.1134/S1063782620120398
Document Type: Article
Language: English
Citation: C. Usha, P. Vimala, “Analytical drain current modeling and simulation of triple material gate-all-around heterojunction TFETs considering depletion regions”, Fizika i Tekhnika Poluprovodnikov, 54:12 (2020), 1374; Semiconductors, 54:12 (2020), 1634–1640
Citation in format AMSBIB
\Bibitem{UshVim20}
\by C.~Usha, P.~Vimala
\paper Analytical drain current modeling and simulation of triple material gate-all-around heterojunction TFETs considering depletion regions
\jour Fizika i Tekhnika Poluprovodnikov
\yr 2020
\vol 54
\issue 12
\pages 1374
\mathnet{http://mi.mathnet.ru/phts6681}
\transl
\jour Semiconductors
\yr 2020
\vol 54
\issue 12
\pages 1634--1640
\crossref{https://doi.org/10.1134/S1063782620120398}
Linking options:
  • https://www.mathnet.ru/eng/phts6681
  • https://www.mathnet.ru/eng/phts/v54/i12/p1374
  • This publication is cited in the following 3 articles:
    Citing articles in Google Scholar: Russian citations, English citations
    Related articles in Google Scholar: Russian articles, English articles
    Fizika i Tekhnika Poluprovodnikov Fizika i Tekhnika Poluprovodnikov
    Statistics & downloads:
    Abstract page:45
    Full-text PDF :11
     
      Contact us:
     Terms of Use  Registration to the website  Logotypes © Steklov Mathematical Institute RAS, 2024