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Fizika i Tekhnika Poluprovodnikov, 2017, Volume 51, Issue 4, Page 569
DOI: https://doi.org/10.21883/FTP.2017.04.44354.8407
(Mi phts6196)
 

This article is cited in 1 scientific paper (total in 1 paper)

Manufacturing, processing, testing of materials and structures

Silicon nanowire array architecture for heterojunction electronics

M. M. Solovana, V. V. Brusb, A. I. Mostovyia, P. D. Mar'yanchuka, I. G. Orletskyia, T. T. Kovaliuka, S. L. Abashinc

a Department of Electronics and Energy Engeneering, Chernivtsi National University, Chernivtsi, Ukraine
b Institute for Silicon Photovoltaics, Helmholtz-Zentrum Berlin für Materialien und Energie GmbH, Berlin, Germany
c Department of Physics, National Aerospace University "Kharkiv Aviation Institute", Kharkiv, Ukraine
Full-text PDF (28 kB) Citations (1)
Abstract: Photosensitive nanostructured heterojunctions $n$-TiN/$p$-Si were fabricated by means of titanium nitride thin films deposition ($n$-type conductivity) by the DC reactive magnetron sputtering onto nanostructured single crystal substrates of $p$-type Si (100).
The temperature dependencies of the height of the potential barrier and series resistance of the $n$-TiN/$p$-Si heterojunctions were investigated. The dominant current transport mechanisms through the heterojunctions under investigation were determined at forward and reverse bias.
The heterojunctions under investigation generate open-circuit voltage $V_{oc}$ = 0.8 V, short-circuit current $I_{sc}$ = 3.72 mA/cm$^2$ and fill factor $FF$ = 0.5 under illumination of 100 mW/сm$^2$.
Received: 20.09.2016
Accepted: 29.09.2016
English version:
Semiconductors, 2017, Volume 51, Issue 4, Pages 542–548
DOI: https://doi.org/10.1134/S1063782617040200
Bibliographic databases:
Document Type: Article
Language: English
Citation: M. M. Solovan, V. V. Brus, A. I. Mostovyi, P. D. Mar'yanchuk, I. G. Orletskyi, T. T. Kovaliuk, S. L. Abashin, “Silicon nanowire array architecture for heterojunction electronics”, Fizika i Tekhnika Poluprovodnikov, 51:4 (2017), 569; Semiconductors, 51:4 (2017), 542–548
Citation in format AMSBIB
\Bibitem{SolBruMos17}
\by M.~M.~Solovan, V.~V.~Brus, A.~I.~Mostovyi, P.~D.~Mar'yanchuk, I.~G.~Orletskyi, T.~T.~Kovaliuk, S.~L.~Abashin
\paper Silicon nanowire array architecture for heterojunction electronics
\jour Fizika i Tekhnika Poluprovodnikov
\yr 2017
\vol 51
\issue 4
\pages 569
\mathnet{http://mi.mathnet.ru/phts6196}
\crossref{https://doi.org/10.21883/FTP.2017.04.44354.8407}
\elib{https://elibrary.ru/item.asp?id=29404903}
\transl
\jour Semiconductors
\yr 2017
\vol 51
\issue 4
\pages 542--548
\crossref{https://doi.org/10.1134/S1063782617040200}
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  • https://www.mathnet.ru/eng/phts/v51/i4/p569
  • This publication is cited in the following 1 articles:
    Citing articles in Google Scholar: Russian citations, English citations
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    Fizika i Tekhnika Poluprovodnikov Fizika i Tekhnika Poluprovodnikov
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