Influence of traps in silicon dioxide on the breakdown of MOS structures

A model for numerical calculation of the voltage and delay time of the breakdown of MOS structures based on the anode-hole-injection mechanism, which takes into account the depth distributions of hole and electron traps in the dielectric layer, is developed. It is shown that the breakdown voltage is determined by charge accumulation at hole traps in the gate dielectric near the cathode and depends also on the presence of hole traps near the anode and electron traps. The calculated breakdown delay time follows the exponential law 1/$E$ in a wide range of field strengths and is in agreement with the experimental data. At short impact times ($t<$ 10$^{-5}$ s), breakdown is determined by charge accumulation at free holes.