Silicon metal–oxide–semiconductor transistor with a dependent pocket contact and two-layer polysilicon gate

The characteristics of two design-technology versions of a silicon metal–oxide–semiconductor (MOS) silicon on insulator (SOI) transistor with a source-aligned substrate contact, with one or two polysilicon gate layers are compared. Numerical simulation shows that transistors with a double-layer polysilicon gate have improved reliability, an increased processing speed, and higher resistance to ionizing radiation. The self-aligned fabrication technology of transistors with a dependent pocket contact and double-layer polysilicon gate is proposed, which makes it possible to implement transistors with a large gate width-to-length ratio (to 100 and higher). The described design-technology features of transistor fabrication allow additional control of the transistor channel, improvement in its characteristics, and expansion of the field of application.