A hardware implementation of the cryptosystem based on the Zakrevskij FSM

This paper presents a hardware implementation in FPGA (field-programmable gate array) of the Zakrevskij FSM-based cryptosystem. Using developed software, we generate a FSM (Finite State Machine) and build the VHDL code for the FSM. Then using Xilinx WebPack Design Software, we program an FPGA integrated circuit. We have evaluated the implementation in FPGA of the FSM-based cryptosystem from the point of view of state encoding style.