A mathematical model of an integrated circuit structure

A formal mathematical object is specified and offered for using as a mathematical model of a microelectronic unit structure. The model is intended to be employed in a computer-aided design system at the stage of computing the capacitances of the unit's connecting conductors. A technique for representing the model is offered. The technique provides a possibility to minimize the dimension of the model; the precision of the technique is explored. The results are valid for a broad class of problems solved by means of the Green function technique.