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Solid-State Electronics
Thermal surface interface for high-power arsenide–gallium heterostructure fets
A. B. Pashkovskii, I. V. Kulikova, V. G. Lapin, V. M. Lukashin, N. K. Pristupchik, L. V. Manchenko, V. G. Kalina, M. I. Lopin, A. D. Zakurdaev Research and Production Corporation "Istok" named after Shokin, Fryazino, Moskovskaya obl.
Abstract:
Application of heat-conducting coatings for cooling of high-power FETs based on heterostructures with arsenide–gallium substrate is theoretically analyzed. When the basic technology for manufacturing of transistors is employed in the absence of additional efforts aimed at a decrease in the thermal resistance of the substrate, the application of an additional thermal interface that represents a heat-conducting dielectric coating makes it possible to substantially decrease the overheating of the transistor channel. A several-fold decrease in such overheating can be reached using variations in the thickness of the coating and modification of the transistor structure and working regimes.
Received: 26.09.2017
Citation:
A. B. Pashkovskii, I. V. Kulikova, V. G. Lapin, V. M. Lukashin, N. K. Pristupchik, L. V. Manchenko, V. G. Kalina, M. I. Lopin, A. D. Zakurdaev, “Thermal surface interface for high-power arsenide–gallium heterostructure fets”, Zhurnal Tekhnicheskoi Fiziki, 89:2 (2019), 252–257; Tech. Phys., 64:2 (2019), 220–225
Linking options:
https://www.mathnet.ru/eng/jtf5698 https://www.mathnet.ru/eng/jtf/v89/i2/p252
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Abstract page: | 46 | Full-text PDF : | 38 |
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