A method of synthesis of irredundant circuits (in Zhegalkin's basis) admitting single fault diagnostic test sets with cardinality 1

Background. Testing of combinational circuits is an important theoretical problem with applications to testing and verification of VLSI. The aim of this work is to demonstrate that for an arbitrary Boolean function it is possible to construct a circuit realizing this function and allowing a small single fault diagnosing test set (under inverse faults at outputs of gates). Materials and methods. Circuit design methods based on Zhegalkin polinomials (canonical Reed-Muller polinomial forms) were used. Results. It has been established that for an arbitrary Boolean function $f$, depending on n variables, there exists an irredundant combinational circuit (in the basis $\{x \& y, x \oplus y, 1\}$) realizing $f$ and admitting the single fault diagnosing test set (under inverse faults at outputs of gates).