Implementation basis of exaflops class supercomputer

The paper deals with choice of a circuitry basis for implementation of microprocessors and communication environment of exaflops supercomputers. A comparative analysis of the characteristics of the digital circuits with different complexity which are implemented in the synchronous basis as well as in the self-timed (ST) one was performed. It has proved the fundamental advantages of ST circuits comparing to synchronous analogues: absence of hazards, a maximum reachable operability range, high performance, and relatively low power consumption. Transforming any synchronous circuit into its quasi-ST or ST implementation leads to extension of its operability range independently of its complexity. The advantages of ST circuits show up to the maximum extent when they are used for designing reliable equipment. Various methodologies of ST circuits development are discussed. A comparative analysis of ST circuit implementation in the generic basis of the delay-insensitive circuits that is suggested by the authors and in the NULL Convention Logic circuit basis is performed. It is demonstrated that the suggested basis makes it possible to synthesize the circuits with the best parameters of performance, complexity, and power consumption while developing standard digital circuits serving as the basis for designing high end computing systems and hardware.