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Diskretnaya Matematika, 2017, Volume 29, Issue 4, Pages 87–105
DOI: https://doi.org/10.4213/dm1451
(Mi dm1451)
 

This article is cited in 13 scientific papers (total in 13 papers)

A method of synthesis of irredundant circuits admitting single fault detection tests of constant length

D. S. Romanova, E. Yu. Romanovab

a Lomonosov Moscow State University
b Russian State Social University, Moscow
References:
Abstract: A constructive proof is given that in each of the bases $B'=\{ x\mathbin{\&} y, x\oplus y, x\sim y\}$, $B_1=\{ x\mathbin{\&} y, x\oplus y, 1\}$ any $n$-place Boolean function may be implemented: a) by an irredundant combinational circuit with $n$ inputs and one output admitting (under single stuck-at faults at inputs and outputs of gates) a single fault detection test of length at most 16, b) by an irredundant combinational circuit with $n$ inputs and one output admitting (under single stuck-at faults at inputs and outputs of gates and at primary inputs) a single fault detection test of length at most $2n-2\log_2 n+O(1)$; besides, there exists an $n$-place function that cannot be implemented by an irredundant circuit admitting a detecting test whose length is smaller than $2n-2\log_2 n-\Omega(1)$, c) by an irredundant combinational circuit with $n$ inputs and three outputs admitting (under single stuck-at faults at inputs and outputs of gates and at primary inputs) a single fault detection test of length at most 17.
Keywords: circuit of gates, fault detection test, stuck-at fault, Shannon function, easily testable circuit.
Funding agency Grant number
Russian Foundation for Basic Research 16-01-00593-а
18-01-00800-а
15-01-07474-а
Ministry of Education and Science of the Russian Federation 1.9328.2017/БЧ
Received: 23.08.2017
Revised: 06.11.2017
English version:
Discrete Mathematics and Applications, 2019, Volume 29, Issue 1, Pages 35–48
DOI: https://doi.org/10.1515/dma-2019-0005
Bibliographic databases:
Document Type: Article
UDC: 519.718
Language: Russian
Citation: D. S. Romanov, E. Yu. Romanova, “A method of synthesis of irredundant circuits admitting single fault detection tests of constant length”, Diskr. Mat., 29:4 (2017), 87–105; Discrete Math. Appl., 29:1 (2019), 35–48
Citation in format AMSBIB
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\by D.~S.~Romanov, E.~Yu.~Romanova
\paper A method of synthesis of irredundant circuits admitting single fault detection tests of constant length
\jour Diskr. Mat.
\yr 2017
\vol 29
\issue 4
\pages 87--105
\mathnet{http://mi.mathnet.ru/dm1451}
\crossref{https://doi.org/10.4213/dm1451}
\elib{https://elibrary.ru/item.asp?id=30737805}
\transl
\jour Discrete Math. Appl.
\yr 2019
\vol 29
\issue 1
\pages 35--48
\crossref{https://doi.org/10.1515/dma-2019-0005}
\isi{https://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcApp=Publons&SrcAuth=Publons_CEL&DestLinkType=FullRecord&DestApp=WOS_CPL&KeyUT=000459400000005}
\scopus{https://www.scopus.com/record/display.url?origin=inward&eid=2-s2.0-85062484942}
Linking options:
  • https://www.mathnet.ru/eng/dm1451
  • https://doi.org/10.4213/dm1451
  • https://www.mathnet.ru/eng/dm/v29/i4/p87
  • This publication is cited in the following 13 articles:
    Citing articles in Google Scholar: Russian citations, English citations
    Related articles in Google Scholar: Russian articles, English articles
    Дискретная математика
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    References:44
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