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This article is cited in 1 scientific paper (total in 1 paper)
СЕКЦИОННЫЕ ДОКЛАДЫ
Memory benchmarking characterisation of ARM-based socs
G. T. Wrigley, R. G. Reed, B. Mellado School of Physics, University of the Witwatersrand. 1 Jan Smuts Avenue, Braamfontein, Johannesburg, South Africa, 2000
Abstract:
Computational intensity is traditionally the focus of large-scale computing system designs, generally leaving such designs ill-equipped to efficiently handle throughput-oriented workloads. In addition, cost and energy consumption considerations for large-scale computing systems in general remain a source of concern. A potential solution involves using low-cost, low-power ARM processors in large arrays in a manner which provides massive parallelisation and high rates of data throughput (relative to existing large-scale computing designs). Giving greater priority to both throughput-rate and cost considerations increases the relevance of primary memory performance and design optimisations to overall system performance. Using several primary memory performance benchmarks to evaluate various aspects of RAM and cache performance, we provide characterisations of the performances of four different models of ARM-based system-on-chip, namely the Cortex-A9, Cortex-A7, Cortex-A15 r3p2 and Cortex-A15 r3p3. We then discuss the relevance of these results to high volume computing and the potential for ARM processors.
Keywords:
ARM, memory, benchmarks, throughput-oriented computing, high-volume computing.
Received: 30.09.2014
Citation:
G. T. Wrigley, R. G. Reed, B. Mellado, “Memory benchmarking characterisation of ARM-based socs”, Computer Research and Modeling, 7:3 (2015), 607–613
Linking options:
https://www.mathnet.ru/eng/crm226 https://www.mathnet.ru/eng/crm/v7/i3/p607
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Abstract page: | 114 | Full-text PDF : | 141 | References: | 26 |
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