FPGA-based device for handwritten digit recognition in images

We describe the design and manufacture of a mobile and energy efficient device that allows one to recognize handwritten digits in images using convolutional neural networks. The device is implemented on a field-programmable gate array (FPGA), which is included in the system-on-a-chip Cyclone V SX. Functional diagrams of the computational blocks implementing the convolution and pooling procedures are developed. Functional diagrams of the convolution neural network for the proposed architecture are also described. Results of testing the developed FPGA-based device for its efficiency in terms of handwritten digit recognition accuracy, recognition rate, and power consumption are presented. Results of a performance comparison between a hardware and software implementation of convolutional neural networks are presented.