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Avtomatika i Telemekhanika, 2004, Issue 6, Pages 84–92
(Mi at1590)
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This article is cited in 1 scientific paper (total in 1 paper)
Decision Diagrams
HDL constructs in linear word-level decision diagram based specification
K. Wahid, D. C. Lu, С. Rahman University of Calgary
Abstract:
Linear Decision Diagrams (LDDs) are used in the paper as an intermediate format that allows us to quickly generate the circuit netlist from HDL (hardware description language), such as Verilog, or transform it to HDL description for further ASIC or FPGA synthesis and verification. The results of an extensive experimental study (on memory requirements, run time to convert LDD intermediate format to/from HDL, and verification via simulation) are reported here.
Citation:
K. Wahid, D. C. Lu, С. Rahman, “HDL constructs in linear word-level decision diagram based specification”, Avtomat. i Telemekh., 2004, no. 6, 84–92; Autom. Remote Control, 65:6 (2004), 913–919
Linking options:
https://www.mathnet.ru/eng/at1590 https://www.mathnet.ru/eng/at/y2004/i6/p84
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Statistics & downloads: |
Abstract page: | 136 | Full-text PDF : | 39 | References: | 36 | First page: | 2 |
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