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This article is cited in 4 scientific papers (total in 4 papers)
Control in Technical Systems
Boolean-complement based fault-tolerant electronic device architectures
D. V. Efanova, V. V. Sapozhnikovb, Vl. V. Sapozhnikovb a Russian University of Transport (MIIT), Moscow, 127994 Russia
b Emperor Alexander I St. Petersburg State Transport University, St. Petersburg, 190031 Russia
Abstract:
We propose new fault-tolerant architectures, which, in contrast to the well-known double and triple modular redundancy architectures, include only one copy of the original circuit. In the new architectures, a signal error detection circuit is used to select the functions to be corrected. The circuit is built on the basis of the Boolean complement method with parity check of calculations. A generalized architecture with Boolean complement based signal correction is presented. This architecture permits one to design the simplest fault-tolerant circuits. Algorithms for designing signal error detection circuits, as well as examples of their application, are given.
Keywords:
combinational circuit, fault-tolerant architecture, TMR architecture, DMR architecture with computation checking, error correction with parity code checking, Boolean complement method.
Citation:
D. V. Efanov, D. V. Efanov, V. V. Sapozhnikov, Vl. V. Sapozhnikov, “Boolean-complement based fault-tolerant electronic device architectures”, Avtomat. i Telemekh., 2021, no. 8, 140–158; Autom. Remote Control, 82:8 (2021), 1403–1417
Linking options:
https://www.mathnet.ru/eng/at15625 https://www.mathnet.ru/eng/at/y2021/i8/p140
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Abstract page: | 107 | Full-text PDF : | 7 | References: | 33 | First page: | 14 |
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