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Avtomatika i Telemekhanika, 2014, Issue 8, Pages 131–145
(Mi at14111)
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This article is cited in 43 scientific papers (total in 43 papers)
Logic Control
On codes with summation of data bits in concurrent error detection systems
A. A. Blyudov, D. V. Efanov, V. V. Sapozhnikov, Vl. V. Sapozhnikov Petersburg State Transport University, St. Petersburg, Russia
Abstract:
We consider a complete set of codes with unit bits summation used to organize combinational logic in logical devices. We propose new modified codes and establish their data bits errors detection properties. We also give a classification of codes.
Citation:
A. A. Blyudov, D. V. Efanov, V. V. Sapozhnikov, Vl. V. Sapozhnikov, “On codes with summation of data bits in concurrent error detection systems”, Avtomat. i Telemekh., 2014, no. 8, 131–145; Autom. Remote Control, 75:8 (2014), 1460–1470
Linking options:
https://www.mathnet.ru/eng/at14111 https://www.mathnet.ru/eng/at/y2014/i8/p131
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Statistics & downloads: |
Abstract page: | 242 | Full-text PDF : | 50 | References: | 45 | First page: | 17 |
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