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Modelirovanie i Analiz Informatsionnykh Sistem, 2023, Volume 30, Number 2, Pages 170–186
DOI: https://doi.org/10.18255/1818-1015-2023-2-170-186
(Mi mais797)
 

This article is cited in 1 scientific paper (total in 1 paper)

Computing methodologies and applications

Signal transition graphs for asynchronous data path circuits

A. Kushnerova, S. Bystrovb

a Beer-Sheva, Israel
b Sochi, Russia
References:
Abstract: The paper proposes a method for constructing signal transition graphs (STGs), which are directly mapped into asynchronous circuits for data processing. The advantage of the proposed method is that the resulting circuits are not only output-persistent, but also conformant to the environment. In other approaches, the environment is specified implicitly and/or inexactly and therefore they guarantee only output persistence. The conformation can be verified if both the circuit and its environment are specified by STGs. As an example, we consider a module realizing the function AND2. This module can either wait for both 1s or evaluate the function as soon as at least one 0 arrives. For each case, we draw up a separate STG (scenario) and map it into NCL gates. To provide such a mapping, we specify the behaviors of NCL gates by STG protocols. For data path, such an STG always contains alternative branches with the so-called garbage transitions at the gate inputs. The garbage transitions on a certain wire mean that the circuit is sensitive to the delay in this wire. Ignoring the garbage may lead to a violation of conformation or/and output persistence. For example, in the combinational part of the NCL circuits, the garbage appears on the inputs of NCL gates, and therefore these circuits are not delay insensitive.
Keywords: arithmetic, conformation, decomposition, delay in wires, handshake, pipeline, verification, weak causality.
Received: 05.05.2023
Revised: 29.05.2023
Accepted: 31.05.2023
Document Type: Article
UDC: 004.312.44
MSC: 68W35
Language: English
Citation: A. Kushnerov, S. Bystrov, “Signal transition graphs for asynchronous data path circuits”, Model. Anal. Inform. Sist., 30:2 (2023), 170–186
Citation in format AMSBIB
\Bibitem{KusBys23}
\by A.~Kushnerov, S.~Bystrov
\paper Signal transition graphs for asynchronous data path circuits
\jour Model. Anal. Inform. Sist.
\yr 2023
\vol 30
\issue 2
\pages 170--186
\mathnet{http://mi.mathnet.ru/mais797}
\crossref{https://doi.org/10.18255/1818-1015-2023-2-170-186}
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  • https://www.mathnet.ru/eng/mais797
  • https://www.mathnet.ru/eng/mais/v30/i2/p170
  • This publication is cited in the following 1 articles:
    1. Rosario Mita, Angelo Mazzone, “A Well-Defined Procedure for Designing Robust Asynchronous Controllers for DC-DC Converters”, Chips, 4:1 (2024), 1  crossref
    Citing articles in Google Scholar: Russian citations, English citations
    Related articles in Google Scholar: Russian articles, English articles
    Моделирование и анализ информационных систем
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    References:18
     
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